The overall goal of this project is to design a new generation of fully implantable flexible substrate microelectrode array probes to record neural activity from behaving rodents. In existing approaches, the behaving rodents are either tethered or encumbered by external devices strapped to their bodies. A fully implantable unit would allow improved characterization of brain function via neural recordings in rats in an unrestrained condition. The proposed device is a battery powered electronic chip that utilizes the state-of- the-art integrate-and-fire (IF) representation and proven protocols: microwire array, flexible substrate, and wireless communication. What makes this implantable specification possible is anew IF sampling principle that is able to reduce both the power dissipation and the necessary bandwidth to transmit high-resolution data. We anticipate that it is possible to build an implant that uses less than 2mW of total power dissipation to record, amplify, encode and transmit wirelessly 16 channels of field potentials and extracellular action for 72-96 hours depending on the data rates. An external signal reconstruction algorithm will output neural data with at least 40dB accuracy (better on high amplitude signal regions) at a 20 kHz sampling rate. In order to design, characterize, build and test in vivo the Florida Wireless Implantable Recording Electrodes (FWIRE), we specifically propose: 1. To design, fabricate in VLSI, test in vivo and formulate system specifications for an ultra low power 16- channel amplifier with pulsed output based on the novel integrate-and-fire sampling scheme. The overall power consumption of this subsystem will be below 1mW. 2. To design an ultra-power (1mW), low-bandwidth (500Kpulses/sec) wireless link and integrate the multiple modules (electrodes, integrate-and-fire amplifiers, communication link) into an implantable package using a flexible substrate. 3. To study in vivo the characteristics of FWIRE during the full duration of the implantable probe development. Bottlenecks in the design will be anticipated, found, and corrected; system performance will be fully characterized. [unreadable] [unreadable] [unreadable]